Semiconductor nonvolatile memories comprised of memory cells each having a floating gate are in wide use as flash memories or nonvolatile memories. Such memories are used in digital cameras, portable information terminals and portable phones etc. because the recorded data in such memories are still maintained after the power has been turned off. Because of such uses, a larger capacity and a lower power voltage is demanded to nonvolatile memories.
As for the demand for a larger capacity, it has been proposed that not a one (1)-bit data but a multi-bit data is recorded in one (1) memory cell. Generally, storing multi-bit in a memory cell structure having floating gate is realized by maintaining a plurality of threshold voltage conditions in a memory cell. However, the operation of the memory under a low power voltage becomes difficult when a plurality of threshold voltage conditions are set.
On the other hand, as means for storing multi-bit, a nonvolatile memory of, for example, MONOS structure has been proposed. In this MONOS structure memory cell, data is recorded by varying a threshold voltage by making a trap gate consisting of a nitride film formed within the gate oxide film trap a charge. Because the trap gate is nonconductive, a charge can be trapped locally in the trap gate. Therefore, storage of binary data becomes possible by letting the charge trapped at a source side and a drain side of the trap gate. However, also in the memory cell of such a structure, it is desired to meet the requirement of a lower power voltage by lowering the injection voltage when the charge is injected.
It is therefore the object of the present invention to provide a semiconductor nonvolatile memory device allowing the writing voltage to be lowered and capable of storing multi-bit data, and to provide a method of manufacturing the same.